Session 1: PLENARY SESSION
William H. Robinson (Vanderbilt U.), General Chair; Swarup Bhunia (U. of Florida), Program Chair;
Ryan Kastner (U. of California, San Diego), Vice Program Chair
HOST 2016 opening remarks
Session 2
Ye Zhang - Rice University; and Farinaz Koushanfar - University of California, San Diego
Robust Privacy-Preserving Fingerprint Authentication
Kun Yang, Domenic Forte, and Mark M. Tehranipoor - University of Florida
UCR: An Unclonable Chipless RFID Tag
Rui Liu, Shimeng Yu - Arizona State University, AZ, USA; Huaqiang Wu, Yachuan Pang, He Qian - Tsinghua University, Beijing, CN
A Highly Reliable and Tamper-Resistant RRAM PUF: Design and Experimental Validation
Arunkumar Vijayakumar, Vinay C. Patil, Prof. Sandip Kundu - University of Massachusetts Amherst; Charles B. Prado - Inmetro, Brazil
Machine Learning Resistant Strong PUF: Possible or a Pipe Dream?
Wei-Che Wang, Puneet Gupta, Yair Yona, and Suhas Diggavi - UCLA Electrical Engineering
LEDPUF: Stability-Guaranteed Physical Unclonable
Functions through Locally Enhanced Defectivity
Session 3
Sikhar Patranabis, Debapriya Basu Roy, Yash Shrivastava, Debdeep Mukhopadhyay - Department of Computer Science and Engineering, IIT Kharagpur; and Santosh Ghosh - Intel Labs, Oregon
Parsimonious Design Strategy for Linear
Layers with High Diffusion in Block Ciphers
Vladimir Rožić, Bohan Yang, Wim Dehaene and Ingrid Verbauwhede - KU Leuven, Belgium
Iterating Von Neumann's Post-Processing under Hardware Constraints
ArunKanuparthi - Intel Corporation;Jeyavijayan Rajendran -The University of Texas at Dallas; Ramesh Karri
- NewYork University
Controlling Your Control Flow Graph
Michael Tempelmeier, Fabrizio De Santis - Technical University of Munich; Georg Sigl - FraunhoferAISEC; Jens Peter Kaps - George Mason University
An Area-Optimized Serial Implementation of
ICEPOLE Authenticated Encryption Schemes
Subhadeep Banik, Andrey Bogdanov - DTU Compute, Technical University of Denmark, Lyngby, Denmark; Francesco Regazzoni
- ALARI, University of Lugano, Switzerland; Takanori Isobe, Harunaga Hiwatari, Toru Akishita - Sony Corporation, Japan
Round Gating for Low Energy Block Ciphers
Session 4: POSTER SESSION
Session 6: PLENARY SESSION
Session 7: HARDWARE DEMO
Hardware Demo Competition , No Slides.
Session 10
Falk Schellenberg, Markus Finkeldey, Nils Gerhardt, Martin Hofmann, Amir Moradi and
Christof Paar – Ruhr-U. Bochum, Germany
Large Laser Spots and Fault Sensitivity Analysis
Jakub Breier, Dirmanto Jap and Shivam Bhasin – Nanyang Technological U., Singapore
The Other Side of the Coin: Analyzing Software Encoding Schemes against Fault Injection
Attacks
Peter Samarin, Kerstin Lemke-Rust – Bonn-Rhein-Sieg U. of Applied Sciences, Germany
Christof Paar – Ruhr-U. Bochum, Germany
IP Core Protection using Voltage-Controlled Side-Channel Receivers
Session 11: PANEL I
Jon Ballast, Ethan Cannon, Eric Miller, Kristine Skinner , The Boeing Company
Panel: Hardware-Enabled System Security
James Fahrny , Senior Fellow, Security Research
Hardware Roles in Driving System Security
Tony Jeffs , Sr. Director, Advanced Security Research
Security & Trust
Serge Leef , VP, New Ventures, Mentor Graphics
IoT Applications & Their Implications on Hardware Security
Tom Tkacik , NXP Semiconductor
Hyper connectivity is changing our world
forever
Session 12: PLENARY SESSION
Session 13
Luis Ramirez Rivera, Xiaofang Wang and Danai Chasaki – Villanova U., PA, USA
A Separation and Protection Scheme for On-chip Memory Blocks in FPGAs
Burak Erbagci – Carnegie Mellon U., PA, USA;
Cagri Erbagci – Sabanci U., Turkey;
Nail Etkin, Can Akkaya and Ken Mai – Carnegie Mellon U., PA, USA
A Secure Camouflaged Threshold Voltage Defined Logic Family
Muhammad Yasin – New York U., NY, USA;
Bodhisatwa Mazumda – New York U. Abu Dhabi, United Arab Emirates;
Jeyavijayan Rajendran – U. of Texas at Dallas, TX, USA;
Ozgur Sinanoglu – New York U. Abu Dhabi, United Arab Emirates
SARLock: SAT Attack Resistant Logic Locking
Elif Ozgen – Technische Universiteit Eindhoven, Netherlands;
Louiza Papachristodoulou and Lejla Batina – Radboud University Nijmegen, Netherlands
Classification Algorithms for Template Matching
M. Sadegh Riazi, Neeraj Kumar Reddy Dantu, Laxmi Narasima Vinay Gattu and Farinaz
Koushanfar – Rice U., TX, USA
GenMatch: Secure DNA Compatibility Testing