HOST 2024 | IEEE International Symposium on Hardware Oriented Security and Trust

HOST 2024 PROGRAM, May 6 - 9, 2024 (All times are EST)

█ Regular Sessions █ Special Sessions █ KeyNote & Visionary Talks
█ Plenary Events █ Social Events █ Tutorials & Exhibits

Monday, May 6th
09:30 - 12:00 TUTORIALS 1 - 2
T1. Hardware Security and Trust Verification
Prabhat Mishra - University of Florida
Ankur Srivastava - University of Maryland

T2. Post-Quantum Cryptography: Implementation Attacks and Countermeasures
Daniel Dinu - Intel Corporation
Prasanna Ravi - Nanyang Technological University, Singapore
Markku-Juhani Saarinen - Tampere University, Finland
12:00 - 13:00 Break & Lunch
13:00 - 14:30 TUTORIALS 3 - 4
T3. Explainable AI for Cybersecurity
Zhixin Pan - Florida State University
Prabhat Mishra - University of Florida

T4. Security of Quantum Computing Systems
Jakub Szefer - Yale University
14:30 - 15:00 Break
15:00 - 17:30 TUTORIALS 5 - 6
T5. Heterogeneous Integration Security
Farimah Farahmandi - University of Florida
Mark Tehranipoor - University of Florida

T6. Tabletop exercise - Risks of a Trust-based Supply Chain
Ahalya Sankararaman - University of Waterloo
Sebastian Fischmeister - University of Waterloo
Tuesday, May 7
07:00 - 08:10 Breakfast
07:30 - 17:30 Registration
08:30 - 18:00 Exhibits Demo-Posters
08:10 - 08:30 Opening Remarks: HOST 2024 General and Program Chairs
08:30 - 09:10 Session 1:

Keynote Address: Greg Yeric (Director of Research, CHIPS NSTC program)
Title: The CHIPS R&D Program
09:10 - 10:10 Session 2: Side-channel Leakage with Machine Learning

Session Chair: Fareena Saqib (UNC Charlotte)

*2.1. NoiseHopper: Emission Hopping Air-Gap Covert Side Channel with Lower Probability of Detection
Authors: Md Faizul Bari and Shreyas Sen

*2.2. TinyPower: Side-Channel Attacks with Tiny Neural Networks
Authors: Haipeng Li, Mabon Ninan, Boyang Wang and John Emmert

2.3. SNOW-SCA: ML-assisted Side-Channel Attack on SNOW-V
Authors: Harshit Saurabh, Anupam Golder, Samarth Shivakumar Titti, Suparna Kundu, Chaoyun Li, Angshuman Karmakar and Debayan Das

*HOST 2024 Best Paper Nominee
10:10 - 10:30 AM Break
10:30 - 11:00 Session 3:

Visionary Talk: Ophir Gaathon (Co-founder and CEO, DUST Identity)
Title: Building Trust in Complex Global Supply Chains
11:00 - 12:00 Session 4: Pre-silicon Security Verification and Validation

Session Chair: Kanad Basu (UT Dallas)

4.1. Prioritizing Information Flow Violations: Generation of Ranked Security Assertions for Hardware Designs
Authors: Avinash Ayalasomayajula, Nusrat Farzana Dipu, Debjit Pal and Farimah Farahmandi

4.2. Verifying Memory Confidentiality and Integrity of Intel TDX Trusted Execution Environments
Authors: Hasini DIlanka, Debapriya Chatterjee and Prabat Mishra

4.3. RTL-Spec: RTL Spectrum Analysis for Security Bug Localization
Authors: Samit Miftah, Shamik Kundu, Mordahi Austin, Shiyi Wei and Kanad Basu

12:00 - 13:00 Lunch Break
13:00 - 13:40 Session 5:

Keynote Address: George Orji (Deputy Director, CHIPS NAPMP)
Title: CHIPS-NAPMP: Overview and Next Steps
13:40 - 15:00 Session 6: Hide Behind Masks

Session Chair: Ujwall Guin (Auburn University)

6.1. Masked Memory Primitive for Key Insulated Schemes
Authors: Zachary DiMeglio, Jenna Bustami, Deniz Gurevin, Chenglu Jin, Marten van Dijk and Omer Khan

*6.2. DOMREP II
Authors: Matthias Probst, Manuel Brosch, Michael Gruber and Georg Sigl

*6.3. Security Aspects of Masking on FPGAs
Authors: Barbara Gigerl, Kevin Pretterhofer and Stefan Mangard

6.4. Randomization approaches for Secure SAR ADC design resilient against Power Side-Channel Attacks
Authors: Sumanth N Karanth, Sirish Oruganti, Meizhi Wang and Jaydeep P Kulkarni

*HOST 2024 Best Paper Nominee
15:00 - 16:30 PM Break + Hardware Demos + Poster Presentations

Poster Titles:

  1. Cache Wars: A Comparative Study of UMWAIT, UMONITOR, and Prime-Probe Attacks
  2. Covert Communication Channels Based On Hardware Trojans: Open-Source Dataset and AI-based Detection
  3. Trained to Leak: Hiding Trojan Side-Channels in Neural Network Weights
  4. Towards Practical Fabrication Stage Attacks Using Interrupt-Resilient Hardware Trojans
  5. A Lightweight Non-Oscillatory Delay-Sensor for Remote Power Analysis
  6. Too Hot to Handle: Novel Thermal Side-Channels in Power Attack protected Intel processors
16:30 - 17:10 Session 7:

Keynote Address: Dev Shenoy (OUSD R&E)
17:10 - 18:00 Exhibitors Presentations + Poster Presentations

17:15 - 17:25: JIACO
Title: Preserving Stored Data and Device Functionality After Decapsulation Using Atmospheric Microwave Induced Plasma
Presenter: Mark McKinnon (Sales Director, JIACO Instruments)

17:30 - 17:40: Riscure
Title: Post-Quantum Crypto on Embedded Devices
Presenter: Cameron Howell (Security Analyst)

Wednesday, May 8
07:00 - 08:10 Breakfast
07:30 - 17:30 Registration
08:00 - 16:15 Exhibits Demos
08:30 - 11:00 Ph.D. Dissertation challenge: Will be scheduled in parallel with the program in one of the meeting rooms
08:10 - 08:20 Plenary Session
08:20 - 09:00 Session 8:

Keynote Address: Mohsen Fazlian (Corporate Vice President GM, Product Assurance and Security, Intel)
Title: Security is a Mindset, Not Just A Feature
09:00 - 10:00 Session 9: Neural Network Security

Session Chair: Sazadur Rahman (University of Central Florida)

9.1. QNAD: Quantum Noise Injection for Adversarial Defense in Deep Neural Networks
Authors: Shamik Kundu, Navnil Choudhury, Sanjay Das, Arnab Raha and Kanad Basu

9.2. One Flip Away from Chaos: Unraveling Single Points of Failure in Quantized DNNs
Authors: Cheng Gonge and Yunsi Fei

9.3. Explainability to the Rescue: A Pattern-Based Approach for Detecting Adversarial Attacks
Authors: Sanjas Das, Shamik Kundu and Kanad Basu

10:00 - 10:30 AM Break
10:30 - 11:50 Session 10: SoCs that Don't SoC!!

Session Chair: Jeyavijayan (JV) Rajendran, Texas A&M University

10.1. Empowering Hardware Security with LLM: The Development of a Vulnerable Hardware Database
Authors: Dipayan Saha, Katayoon Yahyaei, Sujan Kumar Saha, Mark Tehranipoor and Farimah Farahmandi

10.2. LightEMU: Hardware Assisted Fuzzing of Trusted Applications
Authors: Dean Sullivan, Haoqi Shan, Sravani Nissankararao, Shup Wang, Yier Jin, Moyao Huang and Yujaia Liu

10.3. DiSPEL: A Framework for SoC Security Policy Synthesis and Distributed Enforcement
Authors: Sudipta Paria, Aritra Dasgupta and Swarup Bhunia

10.4. MaliGNNoma: GNN-Based Malicious Circuit Classifier for Secure Cloud FPGAs
Authors: Lilas Alrahis, Hassan Nassar, Jonas Krautter, Dennis Gnad, Lars Bauer, Jorg Henkel and Mehdi Tahoori

11:50 - 13:00 Lunch Break
13:00 - 14:20 Session 11: Post-Quantum Hardware Security

Session Chair: Reza Azarderakhsh (Florida Atlantic University)

11.1. A High Efficiency Hardware Design for the Post-Quantum KEM HQC
Authors: Francesco Antognazza, Alessandro Barenghi, Gerardo Pelosi and Ruggero Susella

11.2. A Thorough Study of State Leakage Mitigation in Quantum Computing with One-Time Pad
Authors: Chuanqi Xu, Jamie Sikora and Jakub Szefer

11.3. A Hardware-Software Co-Design for the Discrete Gaussian Sampling of FALCON Digital Signature
Authors: Emre Karabulut and Aydin Aysu

11.4. Sparse Polynomial Multiplication-based High-Performance Hardware Implementation for CRYSTALS-Dilithium
Authors: Hang Zhao, Cankun Zhao, Wenping Zhu, Bohan Yang, Shaojun Wei and Leibo Liu

14:20 - 15:50 Session 12: Exhibits, Hardware Demo Session 2 + PM Break + Poster Presentations

Poster Titles:

  1. FitBit: Ensuring Robust and Secure Execution through Runtime-generated Stressmarks
  2. LightFAt: Mitigating Control-flow Explosion via Lightweight PMU-based Control-Flow Attestation
  3. CTR+: A High-Performance Metadata Access Scheme for Secure Embedded Memory in Heterogeneous Computing Systems
  4. Voltage Noise-Based Adversarial Attacks on Machine Learning Inference in Multi-Tenant FPGA Accelerators
  5. Data-Oblivious ML Accelerators using Hardware Security Extensions
  6. DOSCrack: Deobfuscation using Oracle-guided Symbolic execution and Clustering of binary security keys
15:50 - 16:30 Afternoon Keynote from Flex-Logic
16:30 - 17:45 Session 13: Panel 1

Title: Riding the Wave: The Thin Line Between Fortifying AI Hardware and Unleashing Its Potential

Panelists:
Eric Breckenfeld (Nvidia)
Ioannis Savidis (Drexel University)
Guerney Hunt (IBM)
Matt Casto (MMEC)
17:45 - 18:30 Break + Demos + Poster Presentations
18:30 - 20:30 Session 14: Banquet and Award Ceremony
Thursday, May 9
07:00 - 08:20 Breakfast
07:30 - 12:30 Registration
08:20 - 08:30 Plenary Session
08:30 - 09:00 Session 15:

Visionary Talk: Vivek Menon (Mission Assurance Director, NRO)
Title: R.I.P. Logic Locking! Re-examining Threat Vectors with CHIPS Act
09:00 - 10:20 Session 16: System Security

Session Chair: Rozhin Yasaei (University of Arizona)

16.1. RowHammer Cache: A Last-level Cache for Low-Overhead Row-Hammer Tracking
Authors: Aman Singh and Biswabandan Panda

16.2. TrustZoneTunnel: A Cross-world Pattern History Table-based Microarchitectural Side-channel Attack
Authors: Tianhong Xu, Yunsi Fei and Aidong Adam Ding

16.3. Resurrection Attack: Defeating Xilinx MPU's Memory Protection
Authors: Bharadwaj Madabhushi, Chandra Sekhar Mummidi, Sandip Kundu and Daniel Holcomb

16.4. A Security Assessment of Protected Execute-only Firmware in Microcontrollers through Selective Chemical Engraving
Authors: Xiaomei Zeng, Qing Liu, Samuel Chef and Chee Lip Gan

10:20 - 11:00 AM Break + Poster Presentations

  1. A Pre-Silicon Physical Design Study Towards Mitigating EMSCA on Cryptographic ICs
  2. Breaking SCA-Protected CRYSTALS-Kyber with a Single Trace
  3. Time-Aware Re-Synthesis for Secure Quantum Systems
  4. All Your Base Are Belong To Us: Stealing VRP Secrets from Quantum Circuit Structures
  5. Photon Emission Modeling and Machine-Learning Assisted Pre-Silicon Optical Side-channel Simulation
11:00 - 12:00 Session 18: Quantum and Side-Channel

Session Chair: Jiafeng "Harvest" Xie (Villanova University)

18.1. Charlie, Charlie, Charlie on Industrial Control Systems: PLC Control Logic Attacks by Design, Not by Chance
Authors: Adeen Ayub, Wooyeon Jo and Irfan Ahmed

18.2. Calibratable Polymorphic Temperature Sensor for Detecting Side channel and Fault Injection Attacks
Authors: Tasnuva Farheen, Sourav Roy, Jia Di, Shahin Tajik and Domenic Forte

18.3. Dynamic Pulse Switching for Protection of Quantum Computation on Untrusted Clouds
Authors: Theodoros Trochatos, Sanjay Deshpande, Chuanqi Xu, Yao Lu, Yongshan Ding and Jakub Szefer

12:00 - 13:30 Lunch Break + Panel 2: Guardians of the Chips: The Challenge in Closing the Workforce Gap

Moderator: Mike Kines (OSU)

Panelists:
Antonio De La Serna (Siemens)
Patty Schaefer (BAH)
Jeyavijayan "JV" Rajendran (Texas A&M U)
13:30 - 14:50 Session 19: Choose Your PUF Wisely!

Session Chair: Jim Plusquellic (The University of New Mexico)

19.1. SpongePUF: A Modeling Attack Resilient Strong PUF with Scalable Challenge Response Pair
Authors: Zhenzhe Chen, Takashi Sato and Hirofumi Shinohara

19.2. PhenoAuth:A Novel PUF-Phenotype-based Authentication Protocol for IoT Devices
Authors: Fei Hongming, Prosanta Gope, Owen Millwood, Jack Miskelly and Biplab Sikdar

19.3. Machine Learning Attacks on Challenge-Response Obfuscations in Strong PUFs
Authors: Neelofar Hassan and Urbi Chatterjee

19.4. Non-Invasive Attack on Ring Oscillator-based PUFs through Localized X-Ray Irradiation
Authors: Nasr-Eddine Ouldei Tebina, Aghiles Douadi, Luc Salvo, Vincent Beroulle, Nacer-Eddine Zergainoh, Guillaume Hubert, Ioana Vatajelu, Giorgio Di Natale and Paolo Maistri

14:50 - 15:00 Concluding Remarks
Program and General Chairs 2024/2025