Avinash Ayalasomayajula

Senior Research and Development Engineer

Caspia Technologies

Speaker Bio

Avinash is a Senior Research and Development Engineer at Caspia Technologies. He specializes in pre-silicon security verification, where his work focuses on applying formal verification and computer-aided design (CAD) methodologies to detect and mitigate hardware security vulnerabilities. Avinash has developed generative AI-based tools for secure SoC design and verification, collaborating closely with industry partners. His extensive experience in property generation, formal assertion methods, and information flow tracking has contributed significantly to enhancing hardware security. Avinash's passion lies in leveraging emerging AI techniques to fortify chip design against evolving cyber threats. Avinash holds a PhD in Electrical and Computer Engineering from the University of Florida.

Abstract

This talk explores the state-of-the-art in Generative AI (GenAI) and its transformative impact on the semiconductor development lifecycle—particularly in the realm of security verification. By leveraging AI-driven models to detect vulnerabilities early in the design process—well before chip fabrication—engineers can proactively address potential security flaws. GenAI effectively serves as a scalable automated security expert, unlike human-driven interpretations, enabling faster, more consistent assessments that align with the industry's push for reduced development cycles and accelerated time-to-market. Attendees will learn about generative modeling approaches, integration strategies into existing workflows, and the potential benefits in optimizing verification efforts. This session aims to demonstrate how AI-based security verification can result in robust hardware designs that are more resilient against emerging threats.