IEEE International Symposium on Hardware Oriented Security and Trust (HOST)
May 1 - 4, 2023
San Jose, California, USA
HOST 2023 PROGRAM, May 1 - 4, 2023 (All times are PST)
| █ Regular Sessions | █ Special Sessions | █ KeyNote & Visionary Talks | |
| █ Plenary Events | █ Social Events | █ Tutorials & Exhibits |
| Monday, May 1st | |||
| 7:30 - 17:30 | Registration Location: Bayshore Foyer | ||
| 9:30 - 12:00 | Session 1: TUTORIALS 1 - 2 T1. Secure Heterogeneous Integration Farimah Farahmandi - University of Florida Mark Tehranipoor - University of Florida Location: San Jose T2. A Tutorial on Laser Fault Injection: Theory, Practice, Simulation, and Countermeasures Jean-Max Dutertre - Ecole des Mines de Saint-Etienne, France Bodo Selmke - Fraunhofer Institute for Applied and Integrated Security, Germany Location: Santa Clara | ||
| 12:00 - 13:00 | Break | ||
| 13:00 - 14:30 | Session 2: TUTORIALS 3 - 5 T3. Designing and Building More Secure Hardware with CWE™ - A Year in Review Jason Oberg - Cycuity Bob Heinemann - MITRE Location: San Jose T4. Hardware Security and Trust Verification Prabhat Mishra - University of Florida Location: Santa Clara T5. Modern PUF Analysis and Design Roel Maes - Intrinsic-ID, Netherlands Location: Carmel | ||
| 14:30 - 15:00 | Break | ||
| 15:00 - 17:30 | Session 2: TUTORIALS 6 - 7 T6. Physical Inspection for Hardware Assurance Navid Asadizanjani - University of Florida Location: San Jose T7. Side-Channel Analysis: from Concepts to Simulation and Silicon Validation Gang Qu - University of Maryland, College Park Makoto Nagata - Kobe University, Japan Lang Lin - Ansys Inc. Location: Santa Clara | ||
| Tuesday, May 2 | |||
| 7:30 - 17:30 | Registration Location: Bayshore Foyer | ||
| 08:00 - 18:00 | Exhibits Demo-Posters Location: Bayshore Ballroom | ||
| 08:20 - 17:30 | Microelectronics Security Challenge: The competition will run throughout the day from morning Location: Bayshore Ballroom | ||
| 08:30 - 10:00 | Session 3: Plenary Session Opening Remarks: HOST 2023 General and Program Chairs KEYNOTE I: Srini Devadas, Webster Professor of EECS at MIT Title: Moving up the “Abstraction Stack” in Hardware Security Visionary Talk I: Gang Qu, NSF and the University of Maryland Title: Dynamic Voltage Scaling: from Low Power to Security Location: Gateway Ballroom | ||
| 10:00 - 10:30 | AM Break Location: Bayshore Ballroom | ||
| 10:30 - 11:30 | Session 4: Whose Fault is it? 3 paper presentations (details) Session Chair: Sohrab Aftabjahani, Intel Location: Gateway Ballroom | ||
| 11:30 - 12:30 | Session 5: Watch the Channel! 3 paper presentations (details) Session Chair: Aydin Aysu, North Carolina State University Location: Gateway Ballroom | ||
| 12:30 - 13:40 | Lunch Break Location: Bayshore Ballroom | ||
| 13:40 - 15:00 | Session 6: Architecting the Security or Security for Architectures 4 paper presentations (details) Session Chair: Mengmei Ye, IBM T.J. Watson Research Center Location: Gateway Ballroom | ||
| 15:00 - 16:15 | Session 7: Exhibits, Hardware Demo Session 1 Exhibits, Hardware Demo Session 1 + PM Break Location: Bayshore Ballroom | ||
| 16:15 - 17:30 | Session 8: Panel 1: CHIPS Act impact on Supply Chain, Onshoring, Assurance, and US Industry Moderators: Mark Tehranipoor, University of Florida Panelists: John Damoulakis, Cadence Len Orlando, ANSYS Pauline Paki, DHS Saverio Fazzari, Booz Allen Hamilton Devanand Shenoy, OSD Location: Gateway Ballroom | ||
| 17:30 - 18:00 | Session 9: Exhibitors Presentations Moderator: Adam Kimura, Battelle eShard - 17:30 to 17:35 Riscure - 17:35 to 17:40 LeWiz - 17:40 to 17:45 PQShield - 17:45 to 17:50 Hamamatsu - 17:50 to 17:55 Location: Gateway Ballroom | ||
| Wednesday, May 3 | |||
| 7:30 - 17:30 | Registration Location: Bayshore Foyer | ||
| 08:00 - 16:15 | Exhibits Demos Location: Bayshore Ballroom | ||
| 08:30 - 17:30 | Microelectronics Security Challenge: The competition will run throughout the day from morning Location: Bayshore Ballroom | 08:30 - 10:30 | PhD Dissertation challenge: Runs in parallel with program Location: San Jose |
| 08:45 - 10:00 | Session 10: Plenary Session KEYNOTE II: Mark Tehranipoor Title: Secure SoC Development Lifecycle in CHIPS Era Visionary Talk II: Wally Rhines, Cornami Title: Zero Trust Security Becomes Commercially Viable Through Hardware and Software Innovations Location: Gateway Ballroom | ||
| 10:00 - 10:30 | AM Break Location: Bayshore Ballroom | ||
| 10:30 - 11:30 | Session 11: The Power of Sneaky Power! 3 paper presentations (details) Session Chair: Naghmeh Karimi, University of Maryland, Baltimore County Location: Gateway Ballroom | ||
| 11:30 - 12:30 | Session 12: Use Artificial Intelligence vs Leakage! 3 paper presentations (details) Session Chair: M. Tauhidur Rahman, Florida International University Location: Gateway Ballroom | ||
| 12:30 - 13:40 | Lunch Break Location: Bayshore Ballroom | ||
| 13:40 - 15:00 | Session 13: Are you Trusting the Root? 4 paper presentations (details) Session Chair: Yinghua Hu, Synopsys Location: Gateway Ballroom | ||
| 15:00 - 16:15 | Session 14: Exhibits, Hardware Demo Session 2 Exhibits, Hardware Demo Session 2 + PM Break Location: Bayshore Ballroom | ||
| 16:15 - 17:30 | Session 15: Panel 2: Automotive Security: RoadTrip! Where are we and where are we going? Moderators: Jim Plusquellic, University of New Mexico Sohrab Aftabjahani, Intel Corp Panelists: Rob Aitken, Synopsys Norman Chang, Ansys, Inc Chris Jenkins, Sandia National Laboratories Michael Clifford, Toyota InfoTech Labs Pete Hardie, Cadence Inc Location: Gateway Ballroom | ||
| 18:30 - 20:30 | Session 16: Banquet and Award Ceremony Location: Gateway Ballroom | ||
| Thursday, May 4 | |||
| 07:30 - 12:30 | Registration Location: Bayshore Foyer | ||
| 08:45 - 10:00 | Session 17: Plenary Session KEYNOTE III: Jim Will, Aerospace & Defence Business, SkyWater Title: Revitalizing Domestic Semiconductor Manufacturing: The Impact of Chips & Science Act of 2022 Visionary Talk III: Jonathan Graf, CEO of Graf Research Title: Verify the Bits that Fly Location: Gateway Ballroom | ||
| 10:00 - 10:30 | AM Break Location: Bayshore Ballroom | ||
| 10:30 - 11:30 | Session 18: HW/SW Forensic Analysis 3 paper presentations (details) Session Chair: Jiafeng Xie, Villanova University Location: Gateway Ballroom | ||
| 11:30 - 12:30 | Session 19: Secure Quantum Computing 3 paper presentations (details) Session Chair: Xiaolong Guo, Kansas State University Location: Gateway Ballroom | ||
| 12:30 - 14:00 |
|
||
| 14:00 - 15:20 | Session 20: Pull Down the Curtain, then Compute! 4 paper presentations (details) Session Chair: Rosario Cammarota, Intel Location: Gateway Ballroom | ||
| 15:30 - 16:00 | Concluding Remarks Program and General Chairs 2024 Location: Gateway Ballroom | ||
