HOST 2023 | IEEE International Symposium on Hardware Oriented Security and Trust

HOST 2023 Hardware Demos


Demo NO. TITLE
Demo 1 Digital Currency with Seamless Online/Offline Functionality
Authors: Tiamike Dudley, Benjamin Bean, Cyrus Minwalla and Jim Plusquellic
Demo 2 Secure Boot Framework with Remote Attestation for FPGAs
Authors: Vineet Chadalavada, Geraldine Shirley Nicholas, Chaitanya Mukund Bhure, Dhruva Aklekar and Fareena Saqib
Demo 3 Fuzz and Penetration Testing for SoC Security
Authors: Muhammad Monir Hossain, Hasan Al-Shaikh, Kimia Zamiri Azar, Fahim Rahman, Farimah Farahmandi and Mark Tehranipoor
Demo 4 Laser Fault Injection Simulation Tool
Authors: Tasnuva Farheen and Domenic Forte
Demo 5 A Gate-level Power Side-Channel Analysis Tool
Authors: Zelin Lu, Yiting Wang, Omid Aramoon and Gang Qu
Demo 6 Assessing Linear Code Extraction Attack Paths Through FPGA-Based Emulation
Authors: Théophile Gousselot, Jean-Max Dutertre, Olivier Potin and Jean-Baptiste Rigaud
Demo 7 Leakage Simulation versus Leakage Measurement - How far off are we?
Authors: Michael Gruber and Georg Sigl
Demo 8 ML-EMSC: ML-assisted Layout-level EM Side-Channel Leakage Assessment and Estimation
Authors: Tao Zhang, Mark Tehranipoor and Farimah Farahmandi
Demo 9 FormalFuzz: Formal-Assisted Hardware Fuzzer for Finding Software-Exploitable Vulnerabilities in Processors
Authors: Chen Chen, Rahul Kande, Nathan Nguyen, Flemming Andersen, Aakash Tyagi, Ahmad-Reza Sadeghi and Jeyavijayan Rajendran
Demo 10 COOL PUF: A Temperature Resilient PUF Assuring Reliability
Authors: Md Toufiq Hasan Anik, Mohammad Ebrahimabadi, Javad Bahrami, Hasin Ishraq Reefat, Sofiane Takarabt, Jean-Luc Danger, Sylvain Guilley and Naghmeh Karimi
Demo 11 SMART-I: Reconfigurable Dual Core Trusted Execution Environment for Resource-Constrained Devices Achieving 4Tb/J and 10Gb/Sec
Authors: Eslam Tawfik, Sherif Abouzeid, Ahmed Ghonem, Islam Elsadek, Sayed Elgendy and Jeremy Porter
Demo 12 Counterfeit IC Detection using FPGA for Accelerated Transfer Learning
Authors: Chaitanya Bhure, Geraldine Shirley, Dhruvakumar Aklekar and Fareena Saqib
Demo 13 Secure Information Flow Tracking Framework for RISC-V
Authors: Dhruvakumar Vikas Aklekar, Geraldine Shirley Nicholas, Chaitanya Bhure and Fareena Saqib
Demo 14 Hardware Demonstration: Generic Digital Circuit Learning from Adaptive Side-channel Queries
Authors: Dipali Deepak Jain, Rajesh Datta, Guangwei Zhao and Kaveh Shamsi
Demo 15 AI-based Physical Design-Aware Power Side-Channel Leakage Assessment Framework
Authors: Dipayan Saha, Gabriel A Hernandez, Sukanta Dey, Mark Tehranipoor and Farimah Farahmandi
Demo 16 Blockchain Enhanced CAN-FD Communication Security on FPGAs
Authors: Dhruvakumar Aklekar, Naseeruddin Lodge, Vineet Chadalavada and Fareena Saqib
Demo 17 Configurable SoC Security Architecture for Supply-Chain Lifecycle Protection
Authors: Kshitij Raj, Patanjali Sristi Lakshmiprasanna Sriramakumara, Atri Chatterjee, Dipal Halder, Swarup Bhunia and Sandip Ray
Demo 18 FPGA-Based Image Encryption System using CRYSTALS-Kyber Post-Quantum Cryptography
Authors: Chulwoo Lee, Haesung Jung and Hanho Lee
Demo 19 Hardware Demonstration: Mixed-Signal Generic Adaptive Side-Channel Analysis
Authors: Dipali Deepak Jain, Guangwei Zhao, Rajesh Datta and Kaveh Shamsi
Demo 20 An Analysis of FPGA LUT Bias and Entropy for Physical Unclonable Functions
Authors: Jen Jao, Calvin Chan and Jim Plusquellic
Demo 21 Hardware Demo of a Lightweight, Hierarchical Root-of-Trust Security Framework for 3D Printing
Authors: Tyler Cultice, Joseph Clark, Wu Yang and Himanshu Thapliyal
Demo 22 Adversarial Robustness of Machine Learning Models Extracted from Edge Devices Utilizing Side-Channel Attack Analysis
Authors: Aaron Rosen, Christian Moser and Patrick Laverty
Demo 23 Memory Forensics of Firmware Level Attacks in Programmable Logic Controllers in Industrial Control Systems
Authors: Adeen Ayub, Nauman Zubair, Hyunguk Yoo and Irfan Ahmed