IEEE International Symposium on Hardware Oriented Security and Trust (HOST)
HOST 2017 POSTERS
Session Chair: Wujie Wen, Florida International University
- Ag Conductive Bridge RAMs for Physical Unclonable Functions Bertrand Cambou, Fatemeh Afghah, Derek Sonderegger - Northern Arizona University, USA Jennifer Taggart, Hugh Barnaby, Michael Kozicki - Arizona State University, USA
- Fabrication Security and Trust of Domain-Specific ASIC Processors Michael Vai, Karen Gettings and Theodore Lyszczarz - MIT Lincoln Laboratory, USA
- Øzone: Efficient Execution with Zero Timing Leakage for Modern Microarchitectures Zelalem Birhanu Aweke and Todd Austin - University of Michigan, USA
- LWE-Based Lossless Computational Fuzzy Extractor for the IoT Christopher Huth, Paul Duplys - Robert Bosch GmbH, Germany Daniela Becker, Jorge Guajardo - Robert Bosch LLC, USA Tim Günesyu - University of Bremen & DFKI
- Cache Timing Attacks on Recent Microarchitectures Alexandros Andreou, Andrey Bogdanov and Elmar Tischhauser - Technical University of Denmark, Denmark
- Analyzing Security Vulnerabilities of Three-Dimensional Integrated Circuits Jaya Dofe and Qiaoyan Yu - University of New Hampshire, USA
- A Novel Offset Method for Improving Bitstring Quality of a Hardware-Embedded Delay PUF Wenjie Che, Jim Plusquellic - University of New Mexico, USA Fareena Saqib - Florida Institute of Technology, USA
- Malicious CAN-message Attack against Advanced Driving Assistant System Mitsuru Shiozaki, Masashi Nakano, Yuuki Nakazawa, Takaya Kubota and Takeshi Fujino - Ritsumeikan University, Japan
- Improving FPGA based SHA-3 structures Magnus Sundal and Ricardo Chaves - IST / INESC-ID, Portugal
- On Secure Implementations of Quantum-Resistant Supersingular Isogeny Diffie-Hellman Brian Koziel - Texas Instruments, USA Reza Azarderakhsh - Florida Atlantic University, USA David Jao - University of Waterloo, USA
- Protecting Analog Circuits with Parameter Biasing Obfuscation Vaibhav Venugopal Rao and Ioannis Savidis - Drexel University, USA
- Circuit Recognition with Deep Learning Yu-Yun Dai and Robert Brayton - University of California, Berkeley, USA
- Detection of Counterfeit ICs using Public Identification Sequences Peter Samarin and Kerstin Lemke-Rust - Bonn-Rhein-Sieg, University of Applied Sciences, Germany
- Threshold Voltage Defined Multi-Input Complex Gates Asmit De and Swaroop Ghosh - Pennsylvania State University, USA
- Platform Agnostic, Scalable, and Unobtrusive FPGA Gateway Implementation of Moving Target Defense over IPv6 (MT6D) Joseph Sagisi, Joe Tront and Randy Marchany - Virginia Tech, USA
- TTLock: Tenacious and Traceless Logic Locking Muhammad Yasin - New York University, USA Bodhisatwa Mazumdar - Indian Institute of Technology Indore, India Jeyavijayan Rajendran - University of Texas at Dallas, USA Ozgur Sinanoglu - New York University Abu Dhabi, USA
- Exploiting Safe Error Based Leakage of RFID Authentication Protocol using Hardware Trojan Horse Krishna Bagadia, Urbi Chatterjee, Debapriya Basu Roy, Debdeep Mukhopadhyay and Rajat Subhra Chakraborty - Indian Institute of Technology Kharagpur, India
- Characterizing EEPROM for usage as a ubiquitous PUF source Christopher Pavlina - Binghamton University, USA Jacob Torrey, Kyle J. Temkin - Assured Information Security, USA
- On Designing Optimal Camouflaged Layouts Thomas Broadfoot, Carl Sechen and Jeyavijayan Rajendran - University of Texas at Dallas, USA
- Connecting the Dots: Privacy Leakage via Write-Access Patterns to the Main Memory Tara John, Syed Kamran Haider, Hamza Omar and Marten van Dijk - University of Connecticut, USA
- Correlation Power Analysis Attack against STT-MRAM Based Cyptosystems Abhishek Chakraborty, Ankit Mondal and Ankur Srivastava - University of Maryland, College Park, USA
- Synthesis of Hardware Sandboxes for Trojan Mitigation in Systems on Chip Christophe Bobda, Taylor Whitaker - University of Arkansas, USA Charles Kamhoua, Kevin Kwiat, Laurent Njilla - Air Force Research Laboratory, USA
