Rapid proliferation of computing and communication systems with increasing computational power and connectivity into every sphere of modern life has brought security to the forefront of system design, test, and validation processes. The emergence of new application spaces for these systems in the internet-of-things (IoT) regime is creating new attack surfaces as well as new requirements for secure and trusted system operation. Additionally, the design, manufacturing and the distribution of microchip, PCB, as well as other electronic components are becoming more sophisticated and globally distributed with a number of potential security vulnerabilities. Therefore, hardware plays an increasingly important and integral role in system security with many emerging system and application vulnerabilities and defense mechanisms relating to hardware. IEEE International Symposium on Hardware Oriented Security and Trust (HOST) aims to facilitate the rapid growth of hardware-based security research and development. HOST highlights new results in the area of hardware and system security. Relevant research topics include techniques, tools, design/test methods, architectures, circuits, and applications of secure hardware.

Call for Paper

• Hardware Trojan attacks, detection techniques and countermeasures
• Hardware techniques to facilitate software and/or system security
• Hardware-based security primitives (PUFs, RNGs)
• FPGA and system-on-chip (SoC) security
• Side-channel attacks and protection
• Security, privacy, and trust protocols
• Metrics, policies, and standards related to hardware security
• Hardware IP trust (watermarking, metering, trust verification)
• Trusted manufacturing including split manufacturing and 3D ICs
• Security analysis and protection of Internet of Things (IoT)
• Secure and efficient implementation of crypto algorithms
• Reverse engineering and hardware obfuscation
• Supply chain risks mitigation including counterfeit detection & avoidance
• Hardware tampering attacks and protection
• Applications of hardware security to secure system development

You can register (by November 15, 2016, 11:59 p.m. (PST)) and submit (by November 22, 2016, 11:59 p.m. (PST)) your paper at: https://easychair.org/conferences/?conf=host2017. The manuscript should be no more than 6 pages, double column, IEEE format, with a minimum font size of 10 pt. Submissions are anonymous and must not identify the authors, directly or indirectly, anywhere in the manuscript.

Tutorial

For the first time in its history, HOST 2017 will organize multiple 2-hour long hardware security tutorials to take place on the first day of its program. Tutorial proposals should be approximately 3-4 pages and must target a broad audience comprising of both beginners as well as attendees more familiar with hardware security and trust. All tutorial proposal submissions are to be made electronically (PDF in the above specified format) via e-mail (dforte at ece.ufl.edu) by December 1, 2016, 11:59 p.m. (PST).

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Hardware Demo

Students can participate in a hardware demo session by submitting a 1-page proposal describing the research and features to be demonstrated on an FPGA or other hardware platform. Please upload your proposal to EasyChair by February 8, 2017, 11:59 p.m. (PST).

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Awards and Travel Grants

A best paper award will be given to paper whose first author is a full-time student. A best presentation award will be given to a speaker who is a full-time student. Travel grants are available for graduate and undergraduate students.

Click here for a list of important dates