IEEE International Symposium on Hardware Oriented Security and Trust (HOST)
December 7-11, 2020
Virtual Event
List of Hardware Demos
- Attack of the Genes: Finding Keys and Parameters of Locked Analog ICs using Genetic Algorithm Rabin Acharya, Sreeja Chowdhury, Fatemeh Ganji and Domenic Forte
- Hardware Demo of Thermistor and Solar Cell Based PUFs via a PUF based Controller Area Security Framework Carson Labrado and Himanshu Thapliyal
- FIAFINN: A Fault Injection Attack Framework on Binarized Neural Network Inference Accelerator Navid Khoshavi and Yu Bi
- SOLOMON: An Automated Framework for Detecting Fault Attack Vulnerabilities in Hardware Milind Srivastava, Patanjali Slpsk, Indrani Roy, Chester Rebeiro, Aritra Hazra and Swarup Bhunia
- Demo of Fingerprinting Cloud FPGAs Shanquan Tian, Wenjie Xiong, Ilias Giechaskiel, Kasper Rasmussen and Jakub Szefer
- REFaaS: Remote Exploitation of FPGA-as-a-Service Platforms Nitin Pundir, Fahim Rahman, Farimah Farahmandi and Mark Tehranipoor
- FPGA Bitstream Camouflaging Ali Shuja Siddiqui, Yutian Gui, Geraldine Shirley Nicholas and Fareena Saqib
- High-level Synthesis Vulnerabilities: Information Leakage and Control Flow Violations Md Rafid Muttaki and Nitin Pundir
- Machine Learning Techniques in Side-channel Analysis Yutian Gui, Ali Shuja Siddiqui, Fareena Saqib and Chaitanya Mukund Bhure
- RASC v2: Enabling Remote Access to Side-Channels and Leveraging FPGA Acceleration for Real-Time Side-Channel Monitoring Yunkai Bai, Andrew Stern, Jungmin Park, Domenic Forte and Mark Tehranipoor
- Side-channel Power Resistance for Encryption Algorithms using Dynamic Partial Reconfiguration (SPREAD) Ivan Bow, Jithin Joseph, Fareena Saqib, Chintan Patel, Ryan Robucci and Jim Plusquellic
- SCNIFFER: Fully Automated, Low-cost, Efficient EM SCA Attack Josef A Danial, Debayan Das and Shreyas Sen
- Power Delivery Network based Board-Level Security Measurement and Side-Channel Attack Huifeng Zhu, Xiaolong Guo, Xuan Zhang and Yier Jin
- Statistical Ineffective Fault Analysis using FOBOS Glitch Generator Abubakr Abdulgadir, Keyvan Ramezanpour, William Diehl, Paul Ampadu and Jens-Peter Kaps
- Runtime Trust Evaluation Using On-Chip EM Sensors Jiaji He, Leibo Liu, Xiaolong Guo and Yier Jin
- Detecting Recycled SoCs by Exploiting Aging Induced Biases in Memory Cells Wendong Wang, Ujjwal Guin and Adit Singh
- End-to-End Traceability of ICs in Component Supply Chain for Fighting Against Recycling Yuqiao Zhang and Ujjwal Guin
- Hardware Demonstration of Watermarking of NAND Flash Memory Chips Mohammad Sadman Sakib, Aleksandar Milenković and Biswajit Ray
- SPARTA: Laser Probing Approach for Trojan Detection Andrew Stern, Shahin Tajik, Farimah Farahmandi and Mark Tehranipoor
- Current based Remote PCB Authentication using JTAG Architecture Shubhra Deb Paul and Swarup Bhunia
- MeXT-SE: A Design Tool to Generate Secure MPSoCs Md Jubaer Hossain Pantho, Sujan Saha and Christophe Bobda
- Automated Design and Synthesis of Secure System-on-Chip Architectures Atul Prasad Deb Nath, Kshitij Raj, Swarup Bhunia and Sandip Ray
- Machine Learning Bluetooth Transmission State Operation Verification via Monitoring the Transmission Pattern Abdelrahman Elkanishy, Abdel-Hameed Badawy and Paul Furth
