IEEE International Symposium on Hardware Oriented Security and Trust (HOST)
December 7-11, 2020
Virtual Event
Congratulations HOST 2020 Accepted Papers!
| Paper ID | TITLE |
| 4 | Antoine Loiseau, Maxime Lecomte, and Jacques J. A. Fournier. Template Attacks against ECC : practical implementation against Curve25519 |
| 9 | Lauren Biernacki, Mark Gallagher, Valeria Bertacco, and Todd Austin. Thwarting Control Plane Attacks with Displaced and Dilated Address Spaces |
| 13 | Bashir Mohammad Sabquat Bahar Talukder, Vineetha Menon, Biswajit Ray, Tempestt Neal, and Md Tauhidur Rahman. Towards the Avoidance of Counterfeit Memory: Identifying the DRAM Origin |
| 14 | Stefan Hristozov, Manuel Huber, and Georg Sigl. Protecting RESTful IoT Devices from Battery Exhaustion DoS Attacks |
| 15 | Muhammad Arsath K F, Vinod Ganesan, Rahul Bodduna, and Chester Rebeiro. PARAM: A Microprocessor Hardened for Power Side-Channel Attack Resistance** |
| 16 | Elmira Karimi, Yunsi Fei, and David Kaeli. Hardware/Software Obfuscation against Timing Side-channel Attack on a GPU |
| 25 | Victor Arribas, Felix Wegener, Amir Moradi, and Svetla Nikova. Cryptographic Fault Diagnosis using VerFI |
| 26 | Orlando Arias, Dean Sullivan, Haoqi Shan, and Yier Jin. LAHEL: Lightweight Attestation Hardening Embedded Devices using Macrocells |
| 31 | Michael Gruber, Matthias Probst, and Michael Tempelmeier. Statistical Ineffective Fault Analysis of GIMLI |
| 34 | Mir Tanjidur Rahman, Shahin Tajik, M. Sazadur Rahman, Mark Tehranipoor, and Navid Asadizanjani. The Key is Left under the Mat: On the Inappropriate Security Assumption of Logic Locking Schemes |
| 39 | Keyvan Ramezanpour, Paul Ampadu, and William Diehl. RS-Mask: Random Space Masking as an Integrated Countermeasure against Power and Fault Analysis |
| 41 | Anuj Dubey, Aydin Aysu, Rosario Cammarota, and Rosario Cammarota. MaskedNet: The First Hardware Inference Engine Aiming Power Side-Channel Protection |
| 47 | Martin Kelly, and Keith Mayes. High precision Laser Fault Injection using Low-cost Components |
| 51 | Luong Nguyen, Baki Yilmaz, Milos Prvulovic, and Alenka Zajic. A Novel Golden-Chip-Free Clustering Technique Using Backscattering Side Channel for Hardware Trojan Detection** |
| 53 | Calvin Deutschbein, and Cynthia Sturton. Evaluating Security Specification Mining for a CISC Architecture |
| 57 | Rabin Acharya, Sreeja Chowdhury, Fatemeh Ganji, and Domenic Forte. Attack of the Genes: Finding Keys and Parameters of Locked Analog ICs Using Genetic Algorithm |
| 65 | Franz-Josef Streit, Florian Fritz, Andreas Becher, Stefan Wildermann, Stefan Werner, Martin Schmidt-Korth, Michael Pschyklenk, and Jürgen Teich. Secure Boot from Non-Volatile Memory for Programmable SoC Architectures |
| 73 | Rachel Selina Rajarathnam, Yibo Lin, Yier Jin, and David Z. Pan. ReGDS: A Reverse Engineering Framework from GDSII to Gate-level Netlist |
| 74 | Zihao Zhan, Zhenkai Zhang, and Xenofon Koutsoukos. BitJabber: The World's Fastest Electromagnetic Covert Channel** |
| 78 | Toufique Morshed, Md Momin Al Aziz, and Noman Mohammed. CPU and GPU Accelerated Fully Homomorphic Encryption |
| 79 | Rashmi Agrawal, Bu Lake, and Michel Kinsy. A Post-Quantum Secure Discrete Gaussian Noise Sampler |
| 83 | Joseph Sweeney, Mohammed Zackriya V, Samuel Pagliarini, and Lawrence Pileggi. Latch-Based Logic Locking** |
| 86 | Ye Wang, Xiaodan Xi, Michael Orshansky, and Xiaodan Xi. Lattice PUF: A Strong Physical Unclonable Function Provably Secure against Machine Learning Attacks |
| 89 | Benjamin Hettwer, Tobias Horn, Stefan Gehrer, and Tim Güneysu. Encoding Power Traces as Images for Efficient Side-Channel Analysis |
| 90 | Mahmoud KhalafAlla, Mahmoud A. Elmohr, and Catherine Gebotys. Going Deep: Using deep learning techniques with simplified mathematical models against XOR BR and TBR PUFs (Attacks and Countermeasures) |
| 94 | Ahmed A. Ayoub, Mark D. Aagaard, and Ahmed Ayoub. Application-Specific Instruction Set Architecture For An Ultralight Hardware Security Module |
| 97 | Yuan Yao, Tarun Kathuria, Baris Ege, and Patrick Schaumont. Architecture Correlation Analysis: Identifying the Source of Side-channel Leakage at Gate-level |
| 98 | Wei Yan, Huifeng Zhu, Zhiyuan Yu, Fatemeh Tehranipoor, John Chandy, Ning Zhang, and Xuan Zhang. Bit2RNG: Leveraging Bad-page Initialized Table with Bit-error Insertion for True Random Number Generation in Commodity Flash Memory |
| 102 | Honggang Yu, Haocheng Ma, Kaichen Yang, Yiqiang Zhao, Yier Jin, and Honggang Yu. DeepEM: Deep Neural Networks Model Recovery through EM Side-Channel Information Leakage |
| 107 | Aikata, Banashri Karmakar, and Dhiman Saha. DESIV: Differential Fault Analysis of SIV-Rijndael256 with a Single Fault |
** HOST 2020 Best Paper and Best Student paper Nominee
