POSTER SESSION 2

Session Chair: Christopher Maurer, U.S. Army AMRDEC

Wednesday, May 2, 2018 | Time: 14:30 – 15:30

  • Value Prediction for Security (VPsec): Countering Fault Attacks in Modern Microprocessors
    Rami Sheikh, Rosario Cammarota and Wenjia Ruan

  • RF-PUF: IoT Security Enhancement through Authentication of Wireless Nodes using In-situ Machine Learning
    Baibhab Chatterjee, Debayan Das and Shreyas Sen

  • Energy Efficient and Side-Channel Secure Hardware Architecture for Lightweight Cipher SIMON
    Arvind Singh, Nikhil Chawla, Monodeep Kar and Saibal Mukhopadhyay

  • Chaos Computing for Mitigating Side Channel Attack
    Md Badruddoja Majumder, Md Sakib Hasan, Mesbah Uddin and Garrett Rose

  • SAT-based Reverse Engineering of Gate-Level Schematics using Fault Injection and Probing
    Shahrzad Keshavarz, Falk Schellenberg, Bastian Richter, Christof Paar and Daniel Holcomb

  • Self-Authenticating Secure Boot for FPGAs
    Goutham Pocklassery, Wenjie Che, Fareena Saqib, Matt Areno and Jim Plusquellic

  • Protecting Block Ciphers against Differential Fault Attacks without Re-keying
    Anubhab Baksi, Shivam Bhasin, Jakub Breier, Mustafa Khairallah and Thomas Peyrin

  • Inverse Gating for Low Energy Encryption
    Subhadeep Banik, Andrey Bogdanov, Francesco Regazzoni, Takanori Isobe, Toru Akishita and Harunaga Hiwatari