| Paper ID |
TITLE |
| 7 |
Value Prediction for Security (VPsec): Countering Fault Attacks in Modern Microprocessors |
| 13 |
Securing Interconnected PUF Network with Reconfigurability |
| 16 |
Robust, Low-Cost, and Accurate Detection of Recycled ICs using Digital Signatures |
| 21 |
Hardware Virtualization for Protection Against Power Analysis Attack |
| 23 |
Abnormal Vehicle Behavior Induced Using Only Fabricated Informative CAN Messages |
| 25 |
R2D2: Runtime Reassurance and Detection of A2 Trojan |
| 27 |
A Flexible Leakage Trace Collection Setup for Arbitrary Cryptographic IP Cores |
| 28 |
Lowering the Barrier to Online Malware Detection Through Low Frequency Sampling of HPCs |
| 34 |
SIN2: Stealth Infection on Neural Network – A Low-cost Agile Neural Trojan Attack Methodology |
| 48 |
Repurposing SoC Analog Circuitry For Additional COTS Hardware Security |
| 49 |
Comparison of Cost of Protection Against Differential Power Analysis of Selected Authenticated Ciphers |
| 54 |
On State Encoding Against Power Analysis Attacks for Finite State Controllers |
| 55 |
Delay Model and Machine Learning Exploration of a Hardware-Embedded Delay PUF |
| 59 |
Prefetch-guard: Leveraging Hardware Prefetchers to Defend against Covert Channels |
| 65 |
FPGA-Oriented Moving Target Defense against Security Threats from Malicious FPGA Tools |
| 71 |
RF-PUF: IoT Security Enhancement through Authentication of Wireless Nodes using In-situ Machine Learning |
| 72 |
Energy Efficient and Side-Channel Secure Hardware Architecture for Lightweight Cipher SIMON |
| 73 |
Chaos Computing for Mitigating Side Channel Attack |
| 75 |
SAT-based Reverse Engineering of Gate-Level Schematics using Fault Injection and Probing |
| 79 |
Self-Authenticating Secure Boot for FPGAs |
| 91 |
Protecting Block Ciphers against Differential Fault Attacks without Re-keying |
| 111 |
Inverse Gating for Low Energy Encryption |
