Session Chair: Jonathan Graf, Graf Research
Tuesday, May 1, 2018 | Time: 16:15 – 17:45
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Securing Interconnected PUF Network with Reconfigurability
Hongxiang Gu and Miodrag Potkonjak
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Robust, Low-Cost, and Accurate Detection of Recycled ICs using Digital Signatures
Mahabubul Alam, Sreeja Chowdhury, Mark Tehranipoor and Ujjwal Guin
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Hardware Virtualization for Protection Against Power Analysis Attack
Kai Yang, Jungmin Park, Mark Tehranipoor and Swarup Bhunia
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Abnormal Vehicle Behavior Induced Using Only Fabricated Informative CAN Messages
Junko Takahashi, Masashi Tanaka, Hitoshi Fuji, Toshio Narita, Shunsuke Matsumoto and Hiroki Sato
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R2D2: Runtime Reassurance and Detection of A2 Trojan
Yumin Hou, Hu He, Yier Jin, Kaveh Shamsi, Dong Wu and Huaqiang Wu
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A Flexible Leakage Trace Collection Setup for Arbitrary Cryptographic IP Cores
Athanassios Moschos, Apostolos Fournaris and Odysseas Koufopavlou
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Lowering the Barrier to Online Malware Detection Through Low Frequency Sampling of HPCs
Patrick Cronin and Chengmo Yang
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SIN2: Stealth Infection on Neural Network – A Low-cost Agile Neural Trojan Attack Methodology
Tao Liu, Wujie Wen and Yier Jin
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Repurposing SoC Analog Circuitry For Additional COTS Hardware Security
Adam Duncan, Lei Jiang and Martin Swany
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Comparison of Cost of Protection Against Differential Power Analysis of Selected Authenticated Ciphers
William Diehl, Abubakr Abdulgadir, Farnoud Farahmand, Jens-Peter Kaps and Kris Gaj
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On State Encoding Against Power Analysis Attacks for Finite State Controllers
Richa Agrawal and Ranga Vemuri
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Delay Model and Machine Learning Exploration of a Hardware-Embedded Delay PUF
Wenjie Che, Manel Martinez-Ramon, Goutham Pocklassery, Fareena Saqib and Jim Plusquellic
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Prefetch-guard: Leveraging hardware prefetchers to defend against covert channels
Hongyu Fang, Sai Santosh Dayapule, Fan Yao, Milos Doroslovacki and Guru Venkataramani
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FPGA-Oriented Moving Target Defense against Security Threats from Malicious FPGA Tools
Zhiming Zhang, Laurent Njilla, Charles Kamhoua and Qiaoyan Yu