IEEE International Symposium on Hardware Oriented Security and Trust (HOST)
In Person HOST Symposium
June 27 - 30, 2022
Washington DC, USA
HOST 2022 WIP Poster Papers - Session 2 (Wednesday, June 29, 14:50 – 16:40)
| Paper ID | TITLE |
| 52 | Saikat Majumdar, Mohammad Samavatian and Radu Teodorescu. Characterizing Side-Channel Leakage of DNN Classifiers though Performance Counters |
| 26 | Mohammad Ebrahimabadi, Suhee Sanjana Mehjabin, Raphael Viera, Sylvain Guilley, Jean-Luc Danger, Jean-Max Dutertre and Naghmeh Karimi. Detecting Laser Fault Injection Attacks via Time-to-Digital Converter Sensors |
| 62 | Nafis Irtija, Eirini Eleni Tsiropoulou, Cyrus Minwalla and Jim Plusquellic. True Random Number Generation with the Shift-register Reconvergent-Fanout (SiRF) PUF |
| 45 | Jakub Slowik, Gregory Williams, Rummah Albashir, Anthony Samagaio, Fareena Saqib and Geraldine Nicholas. Dynamic Key Updates for LUT Locked Design |
| 55 | Shajib Ghosh, Mohammad Tahsin Mostafiz, Suprith Reddy Gurudu, Shayan Taheri and Navid Asadizanjani. PCB Component Detection for Hardware Assurance: A Feature Selection-based Approach |
| 56 | Sujan Kumar Saha, Joel Mandebi Mbongue and Christophe Bobda. Metrics for Assessing Security of System-on-Chip |
| 58 | Ayaz Akram. Accelerating Address Sanitization for Scientific Applications |
| 60 | Md Rafid Muttaki, Tao Zhang, Mark Tehranipoor and Farimah Farahmandi. FTC: A Universal Sensor for Fault Injection Attack Detection |
| 14 | Anita Aghaie, Amir Moradi, Johannes Tobisch and Nils Wisiol. Security Analysis of Delay-Based Strong PUFs with Multiple Delay Lines |
| 17 | Noeloikeau Charlot, Daniel Gauthier, Daniel Canaday and Andrew Pomerance. Mathematical Model of Strong Physically Unclonable Functions Based on Hybrid Boolean Networks |
| 20 | Kunbei Cai, Zhenkai Zhang and Fan Yao. On the Feasibility of Training-time Trojan Attacks Through Hardware-based Faults in Memory |
| 32 | Reshmi Suragani, Emiliia Nazarenko, Nikolaos Athanasios Anagnostopoulos, Nico Mexis and Elif Bilge Kavun. Identification and Classification of Corrupted PUF Responses via Machine Learning |
| 40 | Tolulope Odetola, Adewale Adeyemo and Syed Rafay Hasan. Hardening Hardware Accelerartor Based CNN Inference Phase against Adversarial Noises |
| 42 | Amin Rezaei, Ava Hedayatipour, Hossein Sayadi, Mehrdad Aliasgari and Hai Zhou. Global Attack and Remedy on IC-Specific Logic Encryption |
| 44 | Yohannes B. Bekele and Daniel B. Limbrick. Evaluating the Impact of Hardware Faults on Program Execution in a Microkernel Environment |
| 49 | Vaibhav Venugopal Rao, Kyle Juretus and Ioannis Savidis. Practical Performance of Analog Attack Techniques |
| 54 | Tianyou Bao, Pengzhou He and Jiafeng Xie. Systolic Acceleration of Polynomial Multiplication for KEM Saber and Binary Ring-LWE Post-Quantum Cryptography |
| 8 | Asha K A, Abhishek Patyal and Hung-Ming Chen. On Reliability Hardening of FPGA based RO-PUF by using Regression Methodologies |
| 25 | Niels van Drueten, Konstantina Miteloudi and Ileana Buhan. Plan your defense: The impact of leakage detection methods for hardware modules |
| 31 | Duhyun Jeon, Dongmin Lee, Dong Kyue Kim and Byong-Deok Choi. Contact PUF: Highly Stable Physical Unclonable Functions Based on Contact Failure Probability in 180 nm, 130 nm, and 28 nm CMOS Processes |
| 61 | Shawn Blanton, Danielle Duvalsaint and Ruben Purdy. Secuirty Metrics for Logic Circuits |
