Session Chair: Aaron E. Cohen, NRL, Washington, DC.

Thursday May 5th, 2016 | Time: 10:30 - 12:10

• A Separation and Protection Scheme for On-chip Memory Blocks in FPGAs
  Luis Ramirez Rivera, Xiaofang Wang and Danai Chasaki - Villanova U., PA, USA.


• A Secure Camouflaged Threshold Voltage Defined Logic Family
  Burak Erbagci - Carnegie Mellon U., PA, USA.
  Cagri Erbagci - Sabanci U., Turkey.
  Nail Etkin, Can Akkaya and Ken Mai - Carnegie Mellon U., PA, USA.


• SARLock: SAT Attack Resistant Logic Locking
  Muhammad Yasin - New York U., NY, USA.
  Bodhisatwa Mazumdar - New York U., Abu Dhabi, United Arab Emirates.
  Jeyavijayan Rajendran - U. of Texas at Dallas, TX, USA.
  Ozgur Sinanoglu - New York U., Abu Dhabi, United Arab Emirates.
  


• Classification Algorithms for Template Matching
  Elif Ozgen - Technische Universiteit Eindhoven, Netherlands.
  Louiza Papachristodoulou and Lejla Batina - Radboud U. Nijmegen, Netherlands.
  


• GenMatch: Secure DNA Compatibility Testing
  M. Sadegh Riazi, Neeraj Kumar Reddy Dantu, Laxmi Narasima Vinay Gattu and Farinaz Koushanfar - Rics U., TX, USA.

^** HOST 2016 Best Paper Nominee