HOST Summit (Virtual)
December 13 - 14, 2021
In Person HOST Symposium
June 27 - 30, 2022
Washington DC, USA
Congratulations HOST 2021 Accepted Papers!
| Paper ID | TITLE | ||
| 3 | Safeguarding the Intelligence of Neural Networks with Built-in Light-weight Integrity MArks (LIMA) | ||
| 6 | HW2VEC: A Graph Learning Tool for Automating Hardware Security | ||
| 11 | Automated Detection of Spectre and Meltdown Attacks using Explainable Machine Learning | ||
| 15 | Single-Trace Side-Channel Attacks on w-Small Polynomial Sampling with Applications to NTRU, NTRU Prime, and CRYSTALS-Dilithium | ||
| 17 | FaultLine: Software-based Fault Injection on Memory Transfers | ||
| 20 | SecWalk: Protecting Page Table Walks Against Fault Attacks | ||
| 21 | Protecting Indirect Branches against Fault Attacks using ARM Pointer Authentication | ||
| 27 | iTimed: Cache Attacks on the Apple A10 Fusion SoC | ||
| 31 | Cross-VM Information Leaks in FPGA-Accelerated Cloud Environments | ||
| 32 | Time Series-based Malware Detection using Hardware Performance Counters | ||
| 39 | A Comparison of Neural Networks for PCB Component Segmentation | ||
| 41 | POCA: First Power-on Chip Authentication in Untrusted Foundry and Assembly | ||
| 45 | Unclonable Optical Identity for Universal Product Verification | ||
| 63 | SynCirc: Efficient Synthesis of Depth-Optimized Circuits for Secure Computation | ||
| 74 | Using Undervolting as an On-Device Defense Against Adversarial Machine Learning Attacks | ||
| 75 | Lightweight Encryption using Chaffing and Winnowing with All-or-Nothing Transform for Network-on-Chip Architectures | ||
| 78 | Contrastive Graph Convolutional Networks for Hardware Trojan Detection in Third Party IP Cores | ||
| 80 | ConNOC: A practical timing channel attack on network-on-chip hardware in a multicore processor | ||
| 81 | HERMES: Hardware-Efficient Speculative Dataflow Architecture for Bonsai Merkle Tree-Based Memory Authentication | ||
| 87 | RUDBA: Reusable User-Device Biometric Authentication Scheme for Multi-service Systems | ||
| 89 | Morpheus II: A RISC-V Security Extension for Protecting Vulnerable Software and Hardware | ||
| 95 | TRRScope: Understanding Target Row Refresh Mechanism for Modern DDR Protection | ||
| 103 | NeurObfuscator: A Full-stack Obfuscation Tool to Mitigate Neural Architecture Stealing | ||
| 110 | Methodology of Assessing Information Leakage through Software-Accessible Telemetries | ||
| 119 | Multiphysics Simulation of EM Side-Channels from Silicon Backside with ML-based Auto-POI Identification | ||
| 122 | Fun-SAT: Functional Corruptibility-Guided SAT-Based Attack on Sequential Logic Encryption | ||
| 124 | JANUS: Boosting Logic Obfuscation Scope Through Reconfigurable FSM Synthesis
| 129 |
Formal Evaluation and Construction of Glitch-resistant Masked Functions |
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