Ms Deirdre Hanford

Deirdre Hanford

Thursday, December 10, 2020 | Time: 12:00 – 12:45 EST

Bio: Deirdre serves as the Chief Security Officer for Synopsys. In this role, she works collaboratively to safeguard Synopsys. In addition, she leads efforts to drive industry awareness and enablement for secure design from software to silicon to support our business in EDA, IP and Software Integrity. She previously served as co-general manager of Synopsys’ Design Group, responsible for leading the development and deployment of our physical design, implementation, and analog/mixed-signal product lines. Deirdre has held a number of positions at Synopsys since joining the company in 1987, including leadership roles in customer engagement, applications engineering, sales, and marketing.
She earned a B.S.E.E. from Brown University and an M.S.E.E. from UC Berkeley. In 2001, Deirdre was a recipient of the YWCA Tribute to Women and Industry (TWIN) Award and the Marie R. Pistilli Women in EDA Achievement Award. Ms. Hanford served as the Chairman of American Electronics Association in 2008. She currently chairs Brown University's Engineering Advisory Committee and serves on the Engineering Advisory Board for UC Berkeley's College of Engineering. Deirdre also serves on the Board of Directors of Cirrus Logic, Inc.

Title: The Role of Security and Test in the New Era of Silicon Lifecycle Management

Abstract: At an unprecedented rate, advanced safety and personal applications are becoming commonplace, while the corresponding software, systems and silicon are increasingly interconnected. These trends have raised all aspects of security to a new level of importance, including the secure design and test of each silicon part. Engineering teams typically focus on optimizing power, performance, and area (PPA), but also must meet stringent goals for manufacturing quality, reliability and resiliency. These non-PPA goals are met through the use of advanced test technologies and robust safeguards addressing post-manufacturing defects, such as soft errors and aging-related phenomena. However, improving a design’s testability may leave it more vulnerable to attacks and unauthorized access. To address these issues, existing and upcoming technologies will ensure the security and integrity of silicon test data and its access. With enhanced silicon security, new and innovative uses of reliable chip data will arise such as system health monitoring across the entire silicon lifecycle. Cloud-based analysis of silicon metrics, securely gathered from on-chip instruments, will allow pre-emptive actions and optimizations, raising system safety, reliability, and security to unprecedented levels.